Z80 Instruction Set — Data Movement
EX
EXX
LD
LDD
LDDR
LDI
LDIR
POP
PUSH
EX
EX DE,HL
| Operation |
Exchanges the 16-bit contents of DE and HL. |
| Op Code |
11101011 |
| T States |
4 |
EX AF,AF'
| Operation |
Exchanges the 16-bit contents of AF and AF'. |
| Op Code |
00001000 |
| T States |
4 |
EX (SP),HL
| Operation |
Exchanges (SP) with L, and (SP+1) with H. |
| Op Code |
11100011 |
| T States |
19 |
EX (SP),regindex
| Operation |
Exchanges (SP) with the LSB of regindex, and
(SP+1) with the MSB of regindex. |
| Op Code |
[regindex] : 11100011
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
|
| T States |
23 |
EXX
EXX
| Operation |
Exchanges the 16-bit contents of BC, DE, and HL with
BC', DE', and HL'. |
| Op Code |
11011001 |
| T States |
4 |
LD
LD reg8D,reg8S
| Operation |
The contents of register reg8S are stored into
reg8D. |
| Op Code |
01[reg8D][reg8S]
| Register |
Bit Field |
| A
| 111
|
| B
| 000
|
| C
| 001
|
| D
| 010
|
| E
| 011
|
| H
| 100
|
| L
| 101
|
| (HL)
| 110 |
|
| T States |
4 or 7 (HL) |
LD reg8,imm8
| Operation |
Stores the immediate value into reg8. |
| Op Code |
00[reg8]110 : [imm8]
| Register |
Bit Field |
| A
| 111
|
| B
| 000
|
| C
| 001
|
| D
| 010
|
| E
| 011
|
| H
| 100
|
| L
| 101
|
| (HL)
| 110 |
|
| T States |
7 or 10 (HL) |
LD reg8,(regindex + ofs8)
| Operation |
Stores the value pointed to by regindex plus
ofs8 into reg8. |
| Op Code |
[regindex] : 01[reg8]110 : [ofs8]
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
| Register |
Bit Field |
| A
| 111
|
| B
| 000
|
| C
| 001
|
| D
| 010
|
| E
| 011
|
| H
| 100
|
| L
| 101
|
|
| T States |
19 |
LD (regindex + ofs8),reg8
| Operation |
Stores reg8 into the memory location pointed to by
regindex plus ofs8. |
| Op Code |
regindex : 01110[reg8] : [ofs8]
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
| Register |
Bit Field |
| A
| 111
|
| B
| 000
|
| C
| 001
|
| D
| 010
|
| E
| 011
|
| H
| 100
|
| L
| 101
|
|
| T States |
19 |
LD (regindex + ofs8), imm8
| Operation |
Stores the immediate data into the memory location pointed to by
regindex plus ofs8. |
| Op Code |
[regindex] : 00110110 : [ofs8] :
[imm8]
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
|
| T States |
19 |
LD A,(reg16)
| Operation |
Stores the value pointed to by reg16 into A. |
| Op Code |
000[reg16]1010
| Register |
Bit Field |
| BC
| 0
|
| DE
| 1
|
|
| T States |
7 |
LD A,(imm16)
| Operation |
Stores the value pointed to by imm16 into A. |
| Op Code |
00111010 : [immLSB] : [immMSB] |
| T States |
13 |
LD (reg16),A
| Operation |
Stores A into the memory location pointed to by
reg16.
| Register |
Bit Field |
| BC
| 0
|
| DE
| 1
|
|
| Op Code |
000[reg16]0010 |
| T States |
7 |
LD (imm16),A
| Operation |
Stores A into the memory location pointed to by
imm16. |
| Op Code |
00110010 : [immLSB] : [immMSB] |
| T States |
13 |
LD A,{ I | R }
| Operation |
Stores the value of register I or R into A |
| Op Code |
11101101 : 0101[reg]111
| Register |
Bit Field |
| I
| 0
|
| R
| 1
|
|
| Flags |
S Z are affected as defined. H N are
reset. P/V holds IFF2. C is unaffected. |
| T States |
9 |
LD { I | R },A
| Operation |
Stores the value of A into register I or R. |
| Op Code |
11101101 : 0100[reg]111
| Register |
Bit Field |
| I
| 0
|
| R
| 1
|
|
| T States |
9 |
LD reg16,imm16
| Operation |
Stores the immediate data into register reg16. |
| Op Code |
00[reg16]0001 : [immLSB] : [immMSB]
| Register |
Bit Field |
| BC
| 00
|
| DE
| 01
|
| HL
| 10
|
| SP
| 11
|
|
| T States |
10 |
LD regindex,imm16
| Operation |
Loads the immediate data into index register regindex |
| Op Code |
[regindex] : 00100001 : [immLSB] :
[immMSB]
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
|
| T States |
14 |
LD HL,(imm16)
| Operation |
Loads the value pointed to by imm16 into HL. |
| Op Code |
00101010 : [immLSB] : [immMSB] |
| T States |
16 |
LD reg16,(imm16)
| Operation |
Loads the value pointed to by imm16 into register
reg16. |
| Op Code |
11101101 : 01[reg16]1011 : [immLSB] :
[immMSB]
| Register |
Bit Field |
| BC |
00 |
| DE |
01 |
| HL (see Undocumented) |
10 |
| SP
| 11 |
|
| T States |
20 |
LD regindex,(imm16)
| Operation |
Loads the value pointed to by imm16 into index register
regindex. |
| Op Code |
[regindex] : 00101010 : [immLSB] :
[immMSB]
| Register |
Bit Field |
| IX
| 11011101 |
| IY
| 11111101 |
|
| T States |
20 |
LD (imm16),HL
| Operation |
Stores the value of HL into the memory location pointed to by
imm16. |
| Op Code |
00100010 : [immLSB] : [immMSB] |
| T States |
16 |
LD (imm16),reg16
| Operation |
Stores the value of register reg16 into the memory location
pointed to by imm16. |
| Op Code |
11101101 : 01[reg16]0011 : [immLSB] :
[immMSB]
| Register |
Bit Field |
| BC |
00
|
| DE |
01 |
| HL (see Undocumented) |
10 |
| SP |
11 |
|
| T States |
20 |
LD (imm16),regindex
| Operation |
Stores the value of index register regindex into the memory
location pointed to by imm16. |
| Op Code |
[regindex] : 00100010 : [immLSB] :
[immMSB]
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
|
| T States |
20 |
LD SP,HL
| Operation |
Loads the value of HL into SP |
| Op Code |
11111001 |
| T States |
6 |
LD SP,regindex
| Operation |
Loads the value of index register regindex into SP. |
| Op Code |
[regindex] : 11111001
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
|
| T States |
10 |
LDD
LDD
| Operation |
Transfers a byte of data from the memory location pointed to by HL to the
memory location pointed to by DE. Then HL, DE, and BC
are decremented. |
| Op Code |
11101101 : 10101000 |
| Flags |
S Z C are not affected H N are reset P/V is reset if
BC becomes zero. Reset otherwise. |
| T States |
16 |
LDDR
LDDR
| Operation |
Transfers a byte of data from the memory location pointed to by HL to the
memory location pointed to by DE. Then HL, DE, and BC
are decremented. If BC is not zero, this operation is repeated. Interrupts can
trigger while this instruction is processing. |
| Op Code |
11101101 : 10111000 |
| Flags |
S Z C are not affected H N P/V are reset |
| T States |
If BC != 0: 21 If BC == 0: 16 |
LDI
LDI
| Operation |
Transfers a byte of data from the memory location pointed to by HL to the
memory location pointed to by DE. Then HL and DE are
incremented and BC is decremented. |
| Op Code |
11101101 : 10100000 |
| Flags |
S Z C are not affected H N are reset P/V is reset if
BC becomes zero. Reset otherwise. |
| T States |
16 |
LDIR
LDIR
| Operation |
Transfers a byte of data from the memory location pointed to by HL to the
memory location pointed to by DE. Then HL and DE are
incremented and BC is decremented. If BC is not zero, this operation is
repeated. Interrupts can trigger while this instruction is processing. |
| Op Code |
11101101 : 10110000 |
| Flags |
S Z C are not affected H N P/V are reset |
| T States |
If BC != 0: 21 If BC == 0: 16 |
POP
POP reg16
| Operation |
The memory location pointed to by SP is stored into
regLSB and SP is incremented. The memory location pointed to
by SP is stored into regMSB and SP is incremented
again |
| Op Code |
11[reg16]0001
| Register |
Bit Field |
| BC
| 00
|
| DE
| 01
|
| HL
| 10
|
| AF
| 11
|
|
| T States |
10 |
POP regindex
| Operation |
The memory location pointed to by SP is stored into
regLSB and SP is incremented. The memory location pointed to
by SP is stored into regMSB and SP is incremented
again |
| Op Code |
[regindex] : 11100001
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
|
| T States |
14 |
PUSH
PUSH reg16
| Operation |
SP is decremented and regMSB is stored into the memory
location pointed to by SP. SP is decremented again and
regLSB is stored into the memory location pointed to by
SP. |
| Op Code |
11[reg16]0101
| Register |
Bit Field |
| BC
| 00
|
| DE
| 01
|
| HL
| 10
|
| AF
| 11
|
|
| T States |
11 |
PUSH regindex
| Operation |
SP is decremented and regMSB is stored into the memory
location pointed to by SP. SP is decremented again and
regLSB is stored into the memory location pointed to by
SP. |
| Op Code |
[regindex] : 11100101
| Register |
Bit Field |
| IX
| 11011101
|
| IY
| 11111101
|
|
| T States |
15 |
This is part of Learn TI-83 Plus Assembly In 28 Days
Copyright (c) 2002, 2003, 2004 Sean McLaughlin
See the file gfdl.html for copying conditions