Z80 Instruction Set — Control


CALL
DJNZ
JP
JR
NOP
RET
RETI
RETN
RST

CALL

CALL imm16
Operation The current PC value plus three is pushed onto the stack, then is loaded with imm16.
Op Code 11001101 : immLSB : immMSB
T States 17

CALL cc,imm16
Operation If condition cc is true, the current PC value plus three is pushed onto the stack, then is loaded with imm16.
Op Code 11[cc]100 : immLSB : immMSB
Condition Bit Field
NZ 000
Z 001
NC 010
C 011
PO 100
PE 101
P 110
M 111
T States If cc is true: 17
If cc is false: 10

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DJNZ

DJNZ imm8
Operation The B register is decremented, and if not zero, the signed value imm8 is added to PC. The jump is measured from the address of the instruction op code.
Op Code 00010000 : [imm8]
T States If B is not 0: 13
If B is 0: 8

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JP

JP imm16
Operation imm16 is copied to PC.
Op Code 11000011 : [immLSB] : [immMSB]
T States 10

JP cc,imm16
Operation If condition cc is true, imm16 is copied to PC.
Op Code 11[cc]010 : [immLSB] : [immMSB]
Condition Bit Field
NZ 000
Z 001
NC 010
C 011
PO 100
PE 101
P 110
M 111
T States 10

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JR

JR imm8
Operation The signed value imm8 is added to PC. The jump is measured from the address of the instruction op code.
Op Code 00011000 : [imm8]
T States 12

JR cc,imm8
Operation If condition cc is true, the signed value imm8 is added to PC. The jump is measured from the address of the instruction op code.
Op Code 001[cc]000
Condition Bit Field
NZ 00
Z 01
NC 10
C 11
T States If cc is true: 12
If cc is false: 7

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NOP

NOP
Operation No operation is performed.
Op Code 00000000
T States 4

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RET

RET
Operation The top stack entry is popped into PC.
Op Code 11001001
T States 10

RET cc
Operation If condition cc is true, the top stack entry is popped into PC.
Op Code 11[cc]000
Condition Bit Field
NZ 000
Z 001
NC 010
C 011
PO 100
PE 101
P 110
M 111
T States If cc is true: 11
If cc is false: 5

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RETI

RETI
Operation Used at the end of a maskable interrupt service routine. The top stack entry is popped into PC, and signals an I/O device that the interrupt has finished, allowing nested interrupts (not a consideration on the TI).
Op Code 11101101 : 01001101
T States 14

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RETN

RETN
Operation Used at the end of a non-maskable interrupt service routine (located at $0066) to pop the top stack entry into PC. The value of IFF2 is copied to IFF1 so that maskable interrupts are allowed to continue as before. NMIs are not enabled on the TI.
Op Code 11101101 : 01000101
T States 14

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RST

RST imm8
Operation The current PC value plus three is pushed onto the stack. The MSB is loaded with $00 and the LSB is loaded with imm8.
Op Code 11[imm8]111
Address Bit Field
00h 000
08h 001
10h 010
18h 011
20h 100
28h 101
30h 110
38h 111
T States 11

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This is part of Learn TI-83 Plus Assembly In 28 Days
Copyright (c) 2002, 2003, 2004 Sean McLaughlin
See the file gfdl.html for copying conditions