Z80 Instruction Set — Arithmetic

ADC

ADC A,reg₈

Operation	reg8 and the carry flag are added to A.
Op Code	10001[reg8] Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z H C are affected as defined P/V detects overflow N is reset
T States	4 or 7 (HL)

ADC A,imm₈

Operation	The immediate value and the carry flag are added to A.
Op Code	11001110 : [imm8]
Flags	S Z H C are affected as defined P/V detects overflow N is reset
T States	7

ADC A,(reg_index + ofs₈)

Operation	The value pointed to by index register regindex plus ofs8, and the carry flag, are added to A.
Op Code	[regindex] : 10001110 : [ofs8] Register Bit Field IX 11011101 IY 11111101
Flags	S Z H C are affected as defined P/V detects overflow N is reset
T States	19

ADC HL,reg₁₆

Operation	The value of reg16 and the carry flag are added to HL.
Op Code	11101101 : 01[reg16]1010 Register Bit Field BC 00 DE 01 HL 10 SP 11
Flags	S Z C are affected as defined P/V detects overflow H is set if there is a carry out of bit 11 N is reset
T States	15

ADD

ADD A,reg₈

Operation	Adds reg8 to A.
Op Code	10000[reg8] Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z H C are affected as defined P/V detects overflow N is cleared
T States	4 or 7 (HL)

ADD A,imm₈

Operation	The immediate value is added to A.
Op Code	11000110 : [imm8]
Flags	S Z H C are affected as defined P/V detects overflow N is cleared
T States	7

ADD A,(reg_index + ofs₈)

Operation	Adds the value of the memory location pointed to by regindex plus ofs8 to A.
Op Code	[regindex] : 10000110 : [ofs8] Register Bit Field IX 11011101 IY 11111101
Flags	S Z H C are affected as defined P/V detects overflow N is cleared
T States	19

ADD HL,reg₁₆

Operation	The value of reg16 is added to HL.
Op Code	00[reg16]1001 Register Bit Field BC 00 DE 01 HL 10 SP 11
Flags	S Z P/V are unaffected C is affected as defined H is set if there is a carry out of bit 11 N is reset
T States	11

ADD IX,reg₁₆

Operation	The value of reg16 is added to IX.
Op Code	11011101 : 00[reg16]1001 Register Bit Field BC 00 DE 01 IX 10 SP 11
Flags	S Z P/V are unaffected C is affected as defined H is set if there is a carry out of bit 11 N is reset
T States	15

ADD IY,reg₁₆

Operation	The value of reg16 is added to IY.
Op Code	11111101 : 00[reg16]1001 Register Bit Field BC 00 DE 01 IY 10 SP 11
Flags	S Z P/V are unaffected C is affected as defined H is set if there is a carry out of bit 11 N is reset
T States	15

CP

CP reg₈

Operation	Subtracts reg8 from A and affects flags according to the result. A is not modified.
Op Code	10111[reg8] Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	4 or 7 (HL)

CP imm₈

Operation	Subtracts the immediate value from A and affects flags according to the result. A is not modified.
Op Code	11111110 : [imm8]
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	7

CP (reg_index + ofs₈)

Operation	Subtracts the memory value pointed to by regindex plus ofs8 from A and affects the flags according to the result. A is not modified.
Op Code	[regindex] : 10111110 : [ofs8] Register Bit Field IX 11011101 IY 11111101
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	19

CPD

CPD

Operation	Compares the value of the memory location pointed to by HL with A. HL and BC are then decremented.
Op Code	11101101 : 10101001
Flags	S Z H are affected as defined P/V is reset if BC becomes zero N is set C is unaffected
T States	16

CPDR

CPDR

Operation	Compares the value of the memory location pointed to by HL with A. HL and BC are then decremented. If BC is not zero and Z is not set, this operation is repeated. Interrupts can trigger while this instruction is processing.
Op Code	11101101 : 10111001
Flags	S Z H are affected as defined P/V is reset if BC becomes zero N is set C is unaffected
T States	If BC != 0 and Z is reset: 21 If BC == 0 or Z is set: 16

CPI

CPI

Operation	Compares the value of the memory location pointed to by HL with A. HL is incremented and BC is decremented.
Op Code	11101101 : 10100001
Flags	S Z H are affected as defined P/V is reset if BC becomes zero N is set C is unaffected
T States	16

CPIR

CPIR

Operation	Compares the value of the memory location pointed to by HL with A. HL is incremented and BC is decremented. If BC is not zero and Z is not set, this operation is repeated. Interrupts can trigger while this instruction is processing.
Op Code	11101101 : 10110001
Flags	S Z H are affected as defined P/V is reset if BC becomes zero N is set C is unaffected
T States	If BC != 0 and Z is reset: 21 If BC == 0 or Z is set: 16

CPL

CPL

Operation	The contents of A are inverted (one's complement).
Op Code	00101111
Flags	S Z P/V C are not affected H N are set
T States	4

DAA

DEC

DEC reg₈

Operation	Subtracts one from reg8.
Op Code	00[reg8]101 Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z H are affected as defined P/V is set if operand was $80 before operation N is set C is unaffected
T States	4 or 11 (HL)

DEC (reg_index + ofs₈)

Operation	Subtracts one from the memory location pointed to by regindex plus ofs8.
Op Code	[regindex] : 00110101 : [ofs8] Register Bit Field IX 11011101 IY 11111101
Flags	S Z H are affected as defined P/V is set is operand was $80 before operation N is set C is unaffected
T States	23

DEC reg₁₆

Operation	Subtracts one from reg16.
Op Code	00[reg16]1011 Register Bit Field BC 00 DE 01 HL 10 SP 11
T States	6

DEC reg_index

Operation	Subtracts one from regindex.
Op Code	[regindex] : 00101011 Register Bit Field IX 11011101 IY 11111101
T States	10

INC

INC reg₈

Operation	Adds one to reg8.
Op Code	00[reg8]100 Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z H are affected as defined P/V is set is operand was $7F before operation C is unaffected
T States	4 or 11 (HL)

INC (reg_index + ofs₈)

Operation	Adds one to the memory location pointed to by regindex plus ofs8.
Op Code	[regindex] : 00110100 : [ofs8] Register Bit Field IX 11011101 IY 11111101
Flags	S Z H are affected as defined P/V is set is operand was $7F before operation C is unaffected
T States	23

INC reg₁₆

Operation	Adds one to reg16.
Op Code	00[reg16]0011 Register Bit Field BC 00 DE 01 HL 10 SP 11
T States	6

INC reg_index

Operation	Adds one to regindex.
Op Code	[regindex] : 00100011 Register Bit Field IX 11011101 IY 11111101
T States	10

NEG

NEG

Operation	The contents of A are negated (two's complement). Operation is the same as subtracting A from zero.
Op Code	11101101 : 01000100
Flags	S Z H are affected as defined P/V is set if A was $80 before operation N is set C is set if A was not $00 before operation
T States	8

SBC

SBC A,reg₈

Operation	Subtracts reg8 and the carry flag from A.
Op Code	10011[reg8] Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	4 or 7 (HL)

SBC A,imm₈

Operation	Subtracts the immediate value and the carry flag from A.
Op Code	11011110 : [imm8]
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	7

SBC A,(reg_index + ofs₈)

Operation	Subtracts the value at the memory location pointed to by regindex plus ofs8, and the carry flag from A
Op Code	[reg16] : 10011110 : [ofs8] Register Bit Field IX 11011101 IY 11111101
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	19

SBC HL,reg₁₆

Operation	Subtracts reg16 and the carry flag from HL.
Op Code	11101101 : 01[reg16]0010 Register Bit Field BC 00 DE 01 HL 10 SP 11
Flags	S Z C are affected as defined H is set if a borrow from bit 12 P/V detects overflow N is set
T States	15

SUB

SUB A,reg₈

Operation	Subtracts reg8 from A.
Op Code	10010[reg8] Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	4 or 7 (HL)

SUB A,imm₈

Operation	Subtracts the immediate value from A.
Op Code	11010110 : [imm8]
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	7

SUB A,(reg_index + ofs₈)

Operation	Subtracts the value at the memory location pointed to by regindex plus ofs8 from A
Op Code	[reg16] : 10010110 : [ofs8] Register Bit Field IX 11011101 IY 11111101
Flags	S Z H C are affected as defined P/V detects overflow N is set
T States	19