Z80 Instruction Set — Shift/Rotate


RL
RLA
RLC
RLCA
RLD
RR
RRA
RRC
RRCA
RRD
SLA
SRA
SRL

RL

RL reg8
Operation The contents of reg8 are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
Op Code 11001011 : 00010[reg8]
Register Bit Field
A 111
B 000
C 001
D 010
E 011
H 100
L 101
(HL) 110
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 8 or 15 (HL)

RL (regindex + ofs8)
Operation The contents of the memory location pointed to by regindex plus ofs8 are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
Op Code [regindex] : 11001011 : [ofs8] : 00010110
Register Bit Field
IX 11011101
IY 11111101
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 23

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RLA

RLA
Operation The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
Op Code 00010111
Flags S Z P/V are not affected
H N are reset
See instruction for C.
T States 4

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RLC

RLC reg8
Operation The contents of reg8 are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
Op Code 11001011 : 00000[reg8]
Register Bit Field
A 111
B 000
C 001
D 010
E 011
H 100
L 101
(HL) 110
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 8 or 15 (HL)

RLC (regindex + ofs8)
Operation The contents of the memory location pointed to by regindex plus ofs8 are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
Op Code [regindex] : 11001011 : [ofs8] : 00000110
Register Bit Field
IX 11011101
IY 11111101
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 23

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RLCA

RLCA
Operation The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
Op Code 00000111
Flags S Z P/V are not affected
H N are reset
See instruction for C.
T States 4

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RLD

RLD
Operation The contents of the low-order nibble of (HL) are copied to the high-order nibble of (HL). The previous contents are copied to the low-order nibble of A. The previous contents are copied to the low-order nibble of (HL).
Op Code 11101101 : 01101111
Flags Flags refer to state of A
S Z are affected as defined
H N is reset
P/V is parity
C is not affected
T States 18

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RR

RR reg8
Operation The contents of reg8 are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
Op Code 11001011 : 00011[reg8]
Register Bit Field
A 111
B 000
C 001
D 010
E 011
H 100
L 101
(HL) 110
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 8 or 15 (HL)

RR (regindex + ofs8)
Operation The contents of the memory location pointed to by regindex plus ofs8 are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
Op Code [regindex] : 11001011 : [ofs8] : 00011110
Register Bit Field
IX 11011101
IY 11111101
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 23

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RRA

RRA
Operation The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
Op Code 00011111
Flags S Z P/V are not affected
H N are reset
See instruction for C.
T States 4

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RRC

RRC reg8
Operation The contents of reg8 are rotated left one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
Op Code 11001011 : 00001[reg8]
Register Bit Field
A 111
B 000
C 001
D 010
E 011
H 100
L 101
(HL) 110
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 8 or 15 (HL)

RRC (regindex + ofs8)
Operation The contents of the memory location pointed to by regindex plus ofs8 are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
Op Code [regindex] : 11001011 : [ofs8] : 00001110
Register Bit Field
IX 11011101
IY 11111101
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 23

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RRCA

RRCA
Operation The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
Op Code 00001111
Flags S Z P/V are not affected
H N are reset
See instruction for C.
T States 4

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RRD

RRD
Operation The contents of the low-order nibble of (HL) are copied to the low-order nibble of A. The previous contents are copied to the high-order nibble of (HL). The previous contents are copied to the low-order nibble of (HL).
Op Code 11101101 : 01100111
Flags Flags refer to state of A
S Z are affected as defined
H N is reset
P/V is parity
C is not affected
T States 18

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SLA

SLA reg8
Operation The contents of reg8 are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
Op Code 11001011 : 00100[reg8]
Register Bit Field
A 111
B 000
C 001
D 010
E 011
H 100
L 101
(HL) 110
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 8 or 15 (HL)

SLA (regindex + ofs8)
Operation The contents of the memory location pointed to by regindex plus ofs8 are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
Op Code [regindex] : 11001011 : [ofs8] : 00100110
Register Bit Field
IX 11011101
IY 11111101
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 23

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SRA

SRA reg8
Operation The contents of reg8 are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
Op Code 11001011 : 00101[reg8]
Register Bit Field
A 111
B 000
C 001
D 010
E 011
H 100
L 101
(HL) 110
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 8 or 15 (HL)

SRA (regindex + ofs8)
Operation The contents of the memory location pointed to by regindex plus ofs8 are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
Op Code [regindex] : 11001011 : [ofs8] : 00101110
Register Bit Field
IX 11011101
IY 11111101
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 23

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SRL

SRL reg8
Operation The contents of reg8 are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
Op Code 11001011 : 00111[reg8]
Register Bit Field
A 111
B 000
C 001
D 010
E 011
H 100
L 101
(HL) 110
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 8 or 15 (HL)

SRL (regindex + ofs8)
Operation The contents of the memory location pointed to by regindex plus ofs8 are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
Op Code [regindex] : 11001011 : [ofs8] : 00111110
Register Bit Field
IX 11011101
IY 11111101
Flags S Z are affected as defined
H N are reset
P/V is parity
See instruction for C
T States 23

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This is part of Learn TI-83 Plus Assembly In 28 Days
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